Muaj hmoo Dragon Technology Shenzhen Co., Ltd.
+86-755-23074100
Tiv tauj peb
  • TEL:+8618948705000
  • Email:sales@Ldtac.com
  • Ntxiv: 5th pem teb, Tsev 1, Jinshan Industrial Park, 375, Xixiang Section, Guangshen Road, Xixiang Street, Baoan District, Shenzhen City, Guangdong Province, Suav teb

SiC Fais Fab Module Silver Sintering Txheej Txheem - Kev Ua Haujlwm Zoo hauv Siab -Kev Ntseeg Kev Sib Txuas Tshuab rau Thib Peb-Tsim Semiconductor PCBAs

Jul 02, 2026

 

Thaum Lub Xya Hli 2026, kev lag luam hluav taws xob semiconductor tau ntsib lwm qhov kev nce nqi. Infineon tau kho nws tus nqi thib ob, nrog ze li ntawm 20 tus neeg tsim khoom ua raws li kev nplua, txuas ntxiv xa mus rau 40-50 lub lis piam. Tom qab qhov tshwm sim no yog qhov kev loj hlob tawg ntawm thib peb - tiam SiC/GaN semiconductors hauv thaj chaw xws li tsheb tshiab, AI cov ntaub ntawv chaw HVDC cov khoom siv hluav taws xob, thiab lub zog cia PCS. Noj 800V lub zog tshiab lub tsheb ua piv txwv, kev lag luam nkag mus ntawm SiC lub zog hluav taws xob tau tshaj 60%, thaum qhov kev thov rau siab -cov khoom siv hluav taws xob muaj zog hauv AI cov ntaub ntawv chaw yog tsav qhov kev hloov pauv sai ntawm SiC thev naus laus zis mus rau qhov kub thiab txias dua tam sim no.

 

However, the high-reliability packaging of SiC power modules is becoming a key bottleneck in the industry chain. The thermal conductivity of traditional soldering processes is approximately 50 W/m·K, with a temperature limit of only 220℃, which can no longer meet the requirements of SiC modules for junction temperatures >175℃ and process temperatures >350℃. Silver sintering technology, with its thermal conductivity >200 W/m·K and temperature resistance >350 degree, tau dhau los ua cov txheej txheem tseem ceeb xaiv rau siab - kev ntseeg tau sib cuam tshuam hauv SiC fais fab modules.

 

I. Cov Ntsiab Cai ntawm Nyiaj Sintering

 

Silver sintering yog qhov tseem ceeb ntawm kev sib koom ua ke - xeev diffusion bonding txheej txheem. Tsis zoo li cov kua-theem reflow ntawm soldering, silver sintering siv nano-silver particles (los yog micro-silver particles) nyob rau hauv qis-kub (220-}}}250 degree) thiab high-pressure (20-40MPa) tej yam kev mob ntawm lub caj dab sib txuas ntawm cov khoom sib txuas ntawm cov khoom sib txuas ntawm cov khoom sib txuas thiab cov khoom sib txuas ntawm cov hlau. kev loj hlob mechanisms.

 

Cov txheej txheem no tuaj yeem muab faib ua peb theem:

Theem 1: Particle rearrangement. Nyob rau hauv lub siab, nyiaj hais txog lub cev kev sib cuag thiab rearrangement, tshem tawm thawj porosity.

Theem 2: caj dab loj hlob. Atoms ntawm cov ntsiab lus sib txuas ntawm cov khoom uas nyob ib sab diffuse raws cov ciam teb, tsim "caj dab," ua kom lub zog sib txuas ntawm cov khoom.

Kauj Ruam 3: Kev tshem tawm cov pore. Nruam diffusion ua rau grain loj hlob thiab porosity contraction, thaum kawg ua rau ib tug ntom nyiaj sintered txheej. Tom qab sintering, thermal conductivity ntawm cov nyiaj txheej yog purely metallic, tshem tawm cov thermal kuj ntawm intermetallic compound (IMC) txheej nyob rau hauv ib txwm solders. Lub thermal conductivity nce mus txog 200-250 W / m·K, 4-5 zaug siab dua 50 W / m·K ntawm SnAg solder.

Reliability Verification: After more than 2000 temperature cycling tests (-55℃~200℃), the shear strength of the silver sintered layer remains >15MPa, deb tshaj li ntawm 1000- lub voj voog yuav tsum tau ntawm lub tsheb -qib AEC-Q101 tus qauv. Cov yam ntxwv no ua rau cov nyiaj sintering nyiam kev sib txuas thev naus laus zis rau lub tsheb hluav taws xob lub ntsiab tsav lub zog hluav taws xob thiab kev ntseeg siab aerospace kev siv.

 

II. Cov txheej txheem nyuaj thiab cov cuab yeej tseem ceeb

 

Txawm hais tias muaj qhov zoo ntawm cov nyiaj sintering, nws cov txheej txheem tswj tau ntsib ntau yam teeb meem:

 

1. Sintering Uniformity Control

Uniform sintering of large-area chips (>20 × 20mm) yog thawj qhov kev sib tw. The rheological properties of the silver paste, the uniformity of pressure transmission, and the temperature field distribution all affect the final void ratio. 1. A density difference exceeding 10% between the chip edge and center will lead to thermomechanical stress concentration, accelerating fatigue failure of the interconnect layer.

 

2. Interface Metallization Txheej Matching

Qhov sib txawv ntawm cov coefficient ntawm thermal expansion (CTE) ntawm cov nti rov qab metallization txheej (feem ntau Ag, Al, los yog TiN) thiab sintered nyiaj txheej yuav tsum tau them raws li cov txheej txheem qhov rais. Noj Ag/silver sintering/Ni-Au-DBC system ua piv txwv, CTEs yog 17, 19, thiab 7 ppm/degree, feem. Thermal stress ntawm lub interface yuav tsum tau mitigated los ntawm lub siab nkhaus optimization.

 

3. Void Rate Control

Kev lag luam feem ntau xav tau qhov tsis muaj nqi ntawm<5% in the sintered layer (tested according to IPC-A-610), but in actual production, void rate control for large-area chips is a core challenge. Current mainstream solutions include:

Kauj ruam-los ntawm- kauj ruam siab loading: Ib ob - theem siab nkhaus nrog qis- siab preheating ua raws li siab - siab sintering.

Nano silver paste formulation optimization: Txo sintering ua kom lub zog thiab txhim kho densification kinetics.

Online X-Ray tshuaj ntsuam: 100% X-Ray void tus nqi kuaj pom, muab cov lus qhia tiag tiag- lub sijhawm tawm tswv yim ntawm cov txheej txheem txheej txheem.

 

4. Ceramic substrate synergy

Interface txuam ntawm DBC (Direct Copper Clad) thiab AMB (Active Metal Brazing) ceramic substrates thiab cov nyiaj sintered txheej yog qhov tseem ceeb sib npaug. AMB silicon nitride substrates, nrog rau lawv zoo heev thermal expansion txuam (CTE kwv yees li 2.5ppm / degree), yog sai hloov cov tsoos AlN-DBC tov nyob rau hauv SiC fais fab modules, txhim kho module zog voj voog lub neej.

 

III. Qhov kawg txuas hauv PCBA kawg-rau- xaus kev ntseeg siab

 

Cov txheej txheem nyiaj sintering tsis tsuas yog daws qhov teeb meem kev sib tshuam los ntawm nti mus rau substrate, tab sis kuj tseem cuam tshuam qhov kawg - mus rau - kawg kev ntseeg siab ntawm lub hwj chim module ntim → PCBA los ua ke.

 

Tom qab SiC fais fab module ua tiav sintering thiab kev sib txuas, nws cov hluav taws xob sib txuas rau PCB, kev tswj xyuas thermal, thiab kho txhua yam yuav tsum tau txiav txim siab raws li qhov system- qib kev ntseeg tau:

Thaum tshav kub kub Dissipation Design: Ib txoj hauv kev zoo thermal yuav tsum tau tsim nyob rau hauv qab cov nyiaj sintered txheej, optimizing tag nrho thermal resistance chain los ntawm nti hlws ris kub rau ambient kub.

Substrate Layout: Cov pawg- nce cov qauv ntawm DBC/AMB ceramic substrate thiab PCB yuav tsum tau ua raws li kev simulation thermomechanical.

Lub qhov rais txheej txheem Soldering: Lub reflow soldering kub profiles ntawm lub module thiab lub PCB yuav tsum tau raws li qhov kub thiab txias txwv ntawm cov nyiaj sintered txheej.

Qhob Txheej: Txheej txheej txheej ntawm lub hwj chim module yuav tsum xav txog qhov sib haum xeeb ntawm cov nyiaj txheej.